SP6123EB【PDF 14/18 页】EVAL BOARD FOR SP6123

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APPLICATIONS INFORMATION

Most electrolytic and tantalum capacitors come

with adequate ESR value to generate a zero below

power supplies’ crossover frequency. This is cru-

cial to a stable close loop system. However, this

same system can become unstable if ceramic out-

put capacitors are used. The low ESR associated

with ceramic capacitors can push the ESR zero

above the crossover frequency and often higher

than 1MHz. In this case, type III compensation is

In SP6123, G M (error amplifier transconductance)

and R OUT (error amplifier output impedance) are

specified at 0.6ms and 3M ? , respectively.

For frequencies above the second zero f Z2 , the

feedback gain rises at 20dB/dec and is equal to

A FB = 2 π fR Z C 1

However, the error amplifier gain A EA declines

at -20dB/dec due to C P .

required to provide additional low frequency zero for

adequate phase margin and thus stable operation.

A EA =

G M

2 π fC P

f Z1 =

= 6kHz

f Z2 =

= 11.7kHz

2 π (R 2 // R 3 )C Z G M R OUT

The design of type III compensation using

SP6123 transconductance error amplifier is quite

straightforward. First, the resonant frequency of

the LC output filter could be derived from

f r = = 11.6kHz

2 π√ L 1 C OUT

The values and references used in all the calcula-

tions agree with the schematic shown in Figure 3.

Select values of R2, C1, R Z and C Z to place two

zeros below or equal to the LC resonant fre-

quency. Those two zeros are located at:

2 π R 2 C 1

2 π R Z C Z

There is low frequency pole determined by both

the error amplifier gain and feedback gain. It

occurs at

f P1 = = 3.25Hz

200

Phase

100

Gain

-100

-200

When A FB is less than A EA , the compensated

error amplifier gain is dominated by A FB . As a

result, it shows up as a positive 20dB/dec slope.

However, when the rising A FB crosses the fall-

ing A EA at one particular frequency, the com-

pensated error amplifier gain is now solely de-

termined by A EA . Therefore, the 20dB/dec slope

is converted to a -20dB/dec slope, and the bode

plot demonstrates a double pole at this fre-

quency which is equal to

1 GM

f P2 = 2 π C P C 1 R Z = 221kHz

Select C P such that f P2 is located at least a decade

higher than the crossover frequency.

As shown in Figure 4, this type III compensation

generates a close loop system with 50 degree phase

margin and crossover frequency at 20kHz. This

ensures a stable regulated power supply with tight

DC regulation and fast transient response.

10Hz

100Hz

1.0kHz

10kHz

1.0MHz

10MHz

Frequency

Figure 4. Bode Plot for schematic shown in Figure 3. V IN = 3.3V and V OUT = 1.6V, no load.

Date: 9/13/04

SP6123 Low Voltage, Synchronous Step Down PWM Controller

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